Not applicable.
This invention is in the field of integrated circuits, and is more specifically directed to silicon-on-insulator integrated circuits.
In the field of high frequency electronics, for example in radio frequency and microwave applications, transit time devices are well known design elements for switching and attenuating signals.
One class of transit time device are p-i-n diodes, constructed as a p-n diode with a lightly doped or intrinsic (corresponding to the xe2x80x9cixe2x80x9d) semiconductor region disposed between the p-type and n-type regions. In a forward biased state, a large number of holes and electrons are created in the intrinsic region enabling current to be conducted from the p-type region to the n-type region. Upon removal of the bias, the charge carriers remain in the intrinsic region for some time prior to recombination, due to the absence of recombination sites in this region. In contrast, conventional p-n diodes rapidly cease conduction in response to the removal of bias, due to the relatively high dopant concentration of the anode and cathode regions.
This behavior of the p-i-n diode is used to advantage in high frequency applications, because the residual charge carriers also remain in the intrinsic region when a high frequency signal is superimposed on a forward bias current. This behavior is reflected in apparent negative resistance for small signal variations, providing a variable resistor having decreasing resistance with increasing bias current.
As evident from the foregoing, and as known in the art, the characteristics of the p-i-n diode depend upon the carrier transit time in the intrinsic region. The term xe2x80x9ctransit time devicexe2x80x9d is of course due to this relationship. As known in the art, transit time devices are also quite compatible with conventional manufacturing, at least in the respect that the saturation velocity, upon which transit time depends, is insensitive to doping levels and conductivity type. However, in conventional silicon integrated circuit manufacturing technologies, the performance of transit time devices is limited by the parasitic capacitance of the intrinsic region to substrate. Because these parasitics are nonlinearly dependent on operating frequency and also on device bias, silicon p-i-n diodes in bulk are not particularly useful for high frequency operation.
FIG. 1 illustrates, in cross-section, an example of a conventional p-i-n diode constructed in bulk silicon. In this example, n-type well 4 is formed into substrate 2. At the surface of n-well 4, the p-i-n diode is formed by p+ region 6 that is implanted or otherwise diffused into well 4; p+ contact region 8 (and overlying silicide, if desired) is formed at the surface of p+ region 6. The cathode of the diode has n+ contact region 9, which is also silicide-clad if desired. Silicon dioxide isolation structures 7 isolate contact regions 8, 9 from one another at the surface of the device.
In operation, a forward bias voltage is applied to contact region 8 relative to contact region 9, anode-to-cathode. Because of the large discrepancy in doping concentration between p+ region 6 and n-well 4, a significant space-charge region 4xe2x80x2 is produced in a significant portion of well 4, adjacent to p+ region 6, even in the presence of this forward bias. The size of this region 4xe2x80x2 is effective defined by the width of isolation structure 7 between p+ region 8 and n+ region 9. The depletion of carriers in space-charge region 4xe2x80x2 effectively places this region in a state similar to intrinsic silicon; as such, the device operates as a p-i-n diode. As noted above, p-i-n diodes are useful in high frequency applications, given their negative resistance characteristics.
However, significant parasitic capacitance Cp is present between space-charge region 4xe2x80x2 and substrate 2, as suggested in FIG. 1. In high frequency applications, substantial parasitic capacitance Cp causes signal cross-talk among nearby devices in common substrate 2, as well as energy loss in the signal at high frequencies resulting from the charging and discharging of this capacitance Cp.
Various known approaches to the fabrication of high performance transit time devices have encountered significant limitations. In bulk silicon, a triple-well process may be used to isolate the space-charge region from the substrate, but at significant manufacturing cost. Gallium arsenide p-i-n diodes have excellent performance, but are quite costly to manufacture not only because of material cost, but also because of the limited integration density available in GaAs technology. The p-i-n devices on semi-insulating GaAs substrates are particularly expensive, in no small part due to the necessity of mesa isolation. Silicon-on-sapphire lateral p-i-n diodes are also known in the art, as described in Stabile et al., xe2x80x9cLateral IMPATT diodesxe2x80x9d, Elec. Dev. Letters, Vol. 10, No. 6 (IEEE, 1989); this technology is not only costly from a material standpoint, but also involves significantly higher defect densities than bulk silicon. Lateral isolation is also lacking in conventional silicon-on-sapphire technology.
It is therefore an object of the present invention to provide a p-i-n diode transit time device in which parasitic capacitance to substrate is substantially limited.
It is a further object of the present invention to provide such a device in which the transit time may be determined by a non-critical photolithography operation.
It is a further object of the present invention to provide such a device in which a center transit time charge injection terminal may be readily provided.
It is a further object of the present invention to provide such a device that may be fabricated according to conventional silicon manufacturing technology.
Other objects and advantages of the present invention will be apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.
The present invention may be implemented into an integrated circuit fabricated using silicon-on-insulator (SOI) technology. In an epitaxial single-crystal layer overlying a buried oxide layer, p-type and n-type buried layer regions are formed by masked ion implantation on opposite ends of a contiguous portion of the layer. The region of the epitaxial layer disposed between the buried layer regions is at most lightly doped, if not intrinsic silicon. Contacts are made to the buried layer regions, and optionally to a location within the intermediate intrinsic region to provide charge injection. The resulting device, which may be connected to an adjacent active device such as a transistor, provides a p-i-n diode, having minimal parasitic capacitance to substrate.